Without EUV lithography machines, Huawei’s “Tao’s Law” is rewriting the rules of chip manufacturing.

A few days ago, a “bombshell” was dropped on the global semiconductor industry.

He Tingbo, a Huawei director and president of the semiconductor business unit, officially unveiled "Tao’s Law."

This was not just an ordinary technical presentation, but a rewriting of the rules.

After this wave of news, how much does it actually have to do with attracting investment?

01 The Race to Attract Semiconductor Investments: Most Regions Have Lagged Behind in the Past

To truly grasp the significance of “Tao’s Law,” we must first acknowledge one thing.

The global semiconductor industry operates on a core principle:

Shrink transistors as if slicing tofu—the smaller, the better: 9nm, 7nm, 3nm…

Increasing the number of transistors per unit area on a silicon wafer, thereby boosting chip performance.

Over the past two decades, it was assumed that “attracting chip investment” meant “chasing advanced-process wafer fabs.”

Whoever could bring TSMC on board or build a 2nm factory would be crowned the “Semiconductor Capital.”

Yet for most regions, this path was out of reach from the very start. Why?

Because, according to the script of “Moore’s Law,” advanced processes are the sole yardstick of evaluation.

The construction cost of a 3nm fab easily starts at $20 billion, and the global players have shrunk to just three or four companies: TSMC, Samsung, and Intel.

Land, energy, water, talent, and supporting infrastructure—all are indispensable. Many regions simply lack the necessary conditions and qualifications to host such projects.

Some cities have even touted the slogan of “semiconductor industrial parks.” Their brochures are thick, and their master plans are grand.

Yet after a grand opening, most have fallen into the dilemma of struggling to attract investment, slow implementation, and a lack of companies—even draining local finances.

Take certain regions as examples: despite clearly lacking the local infrastructure to support advanced manufacturing processes, they have still invested tens of billions to attract wafer fabrication projects.

Land was allocated, subsidies were granted, and factories were built, only for the projects to stall at the pilot production stage. What remains are a pile of unfinished factory buildings and outstanding municipal investment bonds. This approach to investment promotion—"betting big to chase trends"—has been publicly criticized in the past.

But this time is different. “Tao’s Law” marks the first instance where a company has presented engineering data—specifically, “381 chips mass-produced over the past six years”—translating the post-Moore’s Law era from academic papers to production lines.

Moreover, the timing is fortuitous: precisely because EUV lithography machines could not be imported, Huawei was forced to take a detour six years earlier than planned—a detour that, ironically, accelerated innovation.

This development warrants careful study by investment promotion agencies across the country as they reassess their strategic positioning; a brand-new development track has already been laid out.

02 What Does Tao’s Law Rewrite? Decoding Three Industry Signals

So what exactly is Huawei’s “Tao’s Law”?

Simply put, it replaces “geometric scaling” with “time scaling.”

Think of it this way: Moore’s Law is about making the room smaller and smaller to cram in more equipment. But what about Tao’s Law?

It keeps the room size constant but redesigns the circuitry, folding and shortening the long pathways to minimize detours for electrical signals.

In the past, the competition was about “how small transistors could be made”; now, it’s about “how fast signals can travel within a chip.”

The method to achieve this is called “logic folding.” Instead of laying out circuits flat, they are folded into two, three, or multiple layers stacked vertically. This shortens the distance signals travel, boosting both density and performance.

Once you grasp this logic, three things become clear.

First, power within the industry chain is shifting from the “top of the process hierarchy” to “various nodes at the system level.”

In the past, wafer fabrication was the most profitable segment of the semiconductor chain, while packaging was viewed as a low-margin “downstream drudgery.”

"Tao’s Law" has redefined the evaluation framework: packaging, interconnects, architecture, and EDA—every single link—is now a critical node for performance breakthroughs.

Whoever masters advanced packaging capabilities will secure a front-row position under this new benchmark.

Second, the rise of advanced packaging from a supporting role to a leading one is already a reality.

Why? Because the demand for AI computing power has rewritten the rules.

The "Tao’s Law" paper presents a set of core data: in large AI clusters, over 80% of energy consumption is spent on data transmission, and over 70% of system costs are allocated to data storage.

In other words, the bottleneck for modern AI chips has long since shifted from “computing speed” to “how smoothly data flows within and between chips.”

The key technologies to address this bottleneck are 2.5D/3D advanced packaging, chiplets, and hybrid bonding.

The Ascend 950PR has officially launched, with single-card computing power 2.87 times that of the NVIDIA H20, and its market share in the domestic all-in-one system market has surged to over 80%.

This achievement is a direct result of advanced packaging capabilities.

Third, the EDA toolchain and chiplet design represent the most underrated opportunities for attracting investment at present.

He Tingbo, a Huawei director and president of the semiconductor business unit, addressed this point candidly in a paper.

For "Tao’s Law" to be fully realized, the biggest bottleneck lies not in hardware, but in the lack of compatible toolchains.

In other words, EDA companies have evolved from being mere “software providers” to becoming the “gatekeepers” for the industrialization of Moore’s Law.

Their status has changed, and so has their scarcity. Capital markets are already pricing this in, but local investment promotion efforts must not lag behind in recognizing this critical juncture.

Whoever can leverage this window of opportunity to integrate EDA teams and chiplet design firms into their local ecosystem will, in three years’ time, have secured a true strategic foothold.

03 How to Recalculate This New Equation: Practical Pathways for Local Investment Promotion

When it comes to investment promotion actions, one must first subtract, then add, and finally settle the ecological accounts.

On one hand, make the right cuts.

Those unrealistic “advanced-process wafer fabs” can be put on hold for now.

This isn’t to say we shouldn’t attract semiconductor investments, but rather that we must choose the right position for our region within the supply chain.

For cities with limited resources, rather than tying up billions in wafer fabs that are out of reach, it’s better to channel those same resources precisely into segments that are within reach.

The detours taken by some localities in recent years have already made the costs clear.

Without a deep understanding of the industry or the project team, the costs of attracting investment rise while risks increase significantly.

We must abandon the habitual mindset of blindly chasing cutting-edge manufacturing processes. Instead, we should identify our industrial positioning based on our own strengths, withdraw limited financial, land, and policy resources from high-risk sectors, and redirect them toward more suitable niche areas.

Avoid the temptation to aim for grandeur and comprehensiveness, and resist the urge to follow trends recklessly. Only by first cutting unrealistic investment targets can we create space for subsequent precise planning.

On the other hand, focus on strategic additions.

Following “Tao’s Law,” there are three categories of feasible investment targets.

The first category consists of advanced packaging companies.

Companies specializing in CoWoS, SoIC, and hybrid bonding processes are directly aligned with the mass production roadmaps of Ascend and Kylin.

Their implementation cycles are relatively short, their land and energy requirements are far lower than those of wafer fabs, and they are compatible with a much wider range of cities.

The second category consists of chiplet design companies.

Relying on mature processes combined with system innovation, the primary technical barrier lies in the team, and hardware infrastructure requirements are moderate.

They are well-suited for medium-sized cities with a decent concentration of talent but where industrial energy consumption cannot reach the levels required by advanced process technologies.

The third category consists of EDA toolchain companies.

These fall under key research priorities on the "critical technology list," with policy incentives continuing to intensify.

Projects are scarce, and the anchor effect of a single project is extremely strong.

Whoever succeeds in attracting the R&D centers of these companies between 2026 and 2027 will have planted an “ecosystem seed” in their region.

Finally, let’s settle this most easily overlooked account.

In the era of "Tao’s Law," attracting investment in the chip industry is not ultimately about competing for individual projects, but about competing for "local ecosystem density."

Packaging plants, design firms, EDA tools, testing and certification services, and talent supply—the more complete the ecosystem across these links, the higher the cost for companies to relocate, and the deeper the city’s competitive barriers.

Huawei Director and President of the Semiconductor Business Unit, He Tingbo, has articulated this point most clearly.

No single company can provide all the answers for the full implementation of “Tao’s Law.”

For investment promotion, it is only by weaving a comprehensive industrial ecosystem that can support companies that we can gain the confidence to continuously expand the market.

In Closing

At this point, everyone should understand the gravity of this matter.

In the past, we always worried that without EUV lithography machines, China’s chip industry would be doomed.

Things are different now; even without EUV, China can still produce high-performance chips.

Capital has already taken the lead, and “Tao’s Law” may have provided a ticket to entry for some regions.